Configurable Folded Bit-Plane Architecture for FIR Filtering

نویسندگان

  • V. Ciric
  • I. Milentijevic
چکیده

The application of folding technique onto array type architectures for FIR filtering gives designers greater flexibility in finding the best trade-off between hardware size and throughput rate [1,2]. The Bit-Plane Architecture (BPA) as a highly regular architecture [3], which allows extensive pipelining, regular layout, high computational throughput, truncation of Least Significant Bits (LSBs) of intermediate results without any loss of accuracy, and programmability of coefficients [3], is a good candidate for application of folding technique. Since the straightforward application of folding technique onto the BPA has not been possible, the transformation of the BPA data flow graph (DFG) that enables the synthesis of the folded FIR filter architecture has been proposed in [4]. However, the problem of the designing of folded FIR filter with changeable number of coefficients still remains unsolved. In this paper we propose configurable folded bit-plane architecture for FIR filtering that allows programming of both number of taps and coefficient length. As a starting point we use the transformed DFG for the BPA proposed in [4] and involve new assignment of folding sets. This paper deals with the mapping of the transformed DFG, for the BPA, onto the configurable folded system.

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تاریخ انتشار 2003